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Physical Society ColloquiumSiGe/Si Structures for Strained Si TransistorsPatricia M. MooneyIBM T.J. Watson Research CenterThe incredible advances in information technology in the last 50 years have come primarily from the invention and miniaturization of the semiconductor devices and integrated circuits. These are used in computers and in almost all of today's products including those utilizing the internet or the global positioning satellite system as well as consumer appliances and children's toys. Recently, however, new materials have been employed to greatly enhance the speed of Si devices and thus expand the range of applications of this relatively inexpensive technology. We have explored the epitaxial growth and properties of SiGe/Si heterostructures for applications in strained Si field-effect transistors.In this talk I will first briefly review the fundamental properties of semiconductor heterostructures and some of the key issues in the epitaxial growth of lattice mismatched semiconductor heterostructures. I will then discuss our recent experimental work on strain-relaxed SiGe/strained Si structures. Strain-relaxed SiGe buffer layers produced by the implantation of He below the interface between a pseudomorphic SiGe layer and the Si(001) substrate and subsequent annealing are significantly more relaxed than layers of the same thickness that were not implanted. He-induced defects formed near the top of the Si substrate during annealing serve as dislocation nucleation sources. By controlling the density and location of the nucleation sources, threading dislocations can be minimized. Elastic (defect free) strain relaxation of SiGe/Si structures has also been investigated. We have recently demonstrated that SiGe layers grown epitaxially on free-standing Si relax elastically. The strain is transferred to the free-standing Si layer resulting in Si under biaxial tensile strain.
Friday, November 5th 2004, 15:30
Ernest Rutherford Physics Building, Keys Auditorium (room 112) |